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PG-32x00 Series Pattern Generator
Features
● Pattern generator or Logic Analyzer front panel software is available for Windows
98/me/2000/xp/Vista.
● Support two port of 16 Channel high accurate 7 digital counter.
● Real time 4 Ports (8 channels/per Port) input/output programmable.
● Variable Standard Logic I/O (LVC1.2V, LVC1.5V, LVC1.8V, LVC2.5V, LVC3.3V, SSTL2||, SSTL3||).
● Fine Adjustable VCCO 1.2V to 3.3V.
● Adjustable threshold voltage from 0 to 2.4V for SSTL2||, 0 to 3V for SSTL3||.
● Easy to edit pattern for clock, counter, I/O bi-direction, I²C, SPI, UART stream...more.
● Support Pattern edit display, Timing display and State list display.
● Support I²C, SPI, more... serial bus timing encode.
● Captures both state and timing simultaneously with one probe.
● Support two External clock up to 200MHz, and perform logic combine.
● High quality clips and wires included with the PG32x00.
Main Screen
The data is displayed as a timing wave form. Each channel is displayed in it's own color.
Channel names, numeric value of data at each cursor and scrollbars are also in this view.
The window can be zoomed in or out to show just a few samples or the entire buffer.
Data can be displayed on screen as a timing waveform.
Each channel can have a user-specified name and can be displayed in any sequence.
Channels can be also be grouped together into busses and viewed in ASCII, hexadecimal, decimal,
binary, or in user defined mnemonics. Time between V1bar, V2bar, and Trigger is displayed.
Zoom scales of 1/2000X to 50X (horizontal). Indicator of current position of buffer shown on screen.
The color of each channel can be set independently.
I/O Pin Location
Characteristic of PG-32x00 Series :
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PG-32400 Series : |
PC Based USB Interface (High Speed Pattern Generator with Logic Analyzer). 32 Channels Pattern Generator, Bi-Direction. Frequency : 16Ch 1Sa/s to 400MHz 2Mega Bytes Memory (PG-32400M). 32Ch 1Sa/s to 400MHz 1Mega Bytes Memory (PG-32400M). 16Ch 1Sa/s to 400MHz 512K Bytes Memory (PG-32400K). 32Ch 1Sa/s to 400MHz 256K Bytes Memory (PG-32400K). Max Input Bandwidth : 200MHz. Max Input Voltage : -2v to +10v. Trigger : 1 Levels. Input Impedance : 100KΩ≦8pf. Threshold Voltage : Adjustable 0v to +3v. External Clock : 2Ch (TTL) 0 to 100MHz. Size (Dimension) :107mm x 77mm x 16mm. |
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PG-32200 Series : |
PC Based USB Interface (High Speed Pattern Generator with Logic Analyzer). 32 Channels Pattern Generator, Bi-Direction. Frequency : 32Ch 1Sa/s to 200MHz 1Mega Bytes Memory (PG-32200M). 32Ch 1Sa/s to 200MHz 256K Bytes Memory (PG-32200K). Max Input Bandwidth : 100MHz. Max Input Voltage : -2v to +10v. Trigger : 1 Levels. Input Impedance : 100KΩ≦8pf. Threshold Voltage : Adjustable 0v to +3v. External Clock : 2Ch (TTL) 0 to 100MHz. Size (Dimension) :107mm x 77mm x 16mm. |
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PG-32400 Series Hardware Specifications :
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Model |
PG-32400K [512K] |
PG-32400M [2 Mega] |
Remark |
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Pattern update rate |
From 1Sa/s to 400 MSa/s |
With 1, 2, 5 Sequence |
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Logic sampling rate |
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External clock rate |
Up to 200 MSa/s |
From Ext. clk0 & Ext.clk1 with standard TTL (1.4V Threshold) Combine OR, NOR, AND, NAND |
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Record length |
32Ch: 256K x 2 /Ch 16Ch: 512K x 2 /Ch |
32Ch: 1M x 2 /Ch 16Ch: 2M x 2 /Ch |
Total = (256K / 1M) x 2 x 32 Ch |
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Number of Channels |
Ch 0 ~ Ch31 (Pattern + Logic Analyzer. GOE ― (Globe output enable active low). 2 External clock. |
32 Channel Bi-Direction default to Ext.clk0, Ext.clk1 (OR, NOR, AND, NAND) |
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I/O Bandwidth |
DC to 200 MHz |
With < 30pF load |
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Input Impedance |
100 KΩ // 8pF |
With 100 Ohm series |
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Max. input voltage |
+10V to -2V |
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I/O Type (drive current, threshold) |
LVC1.5V (10mA, 0.75V) LVC1.8V (12mA, 0.9V) LVC2.5V (16mA, 1.2V) LVC3.3V (20mA, 1.4V) SSTL2 II 2.5V (16mA, 0 to 2.4V) SSTL3 II 3.3V (16Ma, 0 to 3V) |
Drive current (Balance source and sink) Standard Logic I/O. |
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Output enable delay |
Typical < 10 ns |
Input/Output Bi-Direction change |
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Channel skew |
Typical < 200 ps |
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Trigger position |
-67M to 256K / 512K |
-67M to 1Mega / 2Mega |
Any position for user defined |
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Max. Trigger speed |
200MHz / 5ns |
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Trigger Qualify |
0, 1, x (don't care) Settings for all digital channels |
Simultaneous trigger Pattern and Logic channel |
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Power Supply |
No External Power Source Require |
From USB Port < 450mA |
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Net Weight |
120 Grams |
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Size (Dimension) |
107mm x 77mm x 16mm |
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Accessories |
Color wires Harness + clips, USB 2.0 cable User's Manual, CD driver |
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PG-32200 Series Hardware Specifications :
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Model |
PG-32200K [256K] |
PG-32200M [1 Mega] |
Remark |
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Pattern update rate |
From 1Sa/s to 200 MSa/s |
With 1, 2, 5 Sequence |
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Logic sampling rate |
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External clock rate |
Up to 100 MSa/s |
From Ext. clk0 & Ext.clk1 with standard TTL (1.4V Threshold Combine OR, NOR, AND, NAND |
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Record length |
32Ch: 256K x 2 /Ch |
32Ch: 1M x 2 /Ch |
Total = (256K / 1M) x 2 x 32 Ch |
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Number of Channels |
Ch 0 ~ Ch31 (Pattern + Logic Analyzer. GOE ― (Globe output enable active low). 2 External clock. |
32 Channel Bi-Direction default to Ext.clk0, Ext.clk1 (OR, NOR, AND, NAND) |
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I/O Bandwidth |
DC to 100 MHz |
With < 30pF load |
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Input Impedance |
100 KΩ // 8pF |
With 100 Ohm series |
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Max. input voltage |
+10V to -2V |
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I/O Type (drive current, threshold) |
LVC1.5V (10mA, 0.75V) LVC1.8V (12mA, 0.9V) LVC2.5V (16mA, 1.2V) LVC3.3V (20mA, 1.4V) SSTL2 II 2.5V (16mA, 0 to 2.4V) SSTL3 II 3.3V (16Ma, 0 to 3V) |
Drive current (Balance source and sink) Standard Logic I/O. |
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Output enable delay |
Typical < 10 ns |
Input/Output Bi-Direction change |
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Channel skew |
Typical < 200 ps |
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Trigger position |
-67M to 256K / 512K |
-67M to 1Mega / 2Mega |
Any position for user defined |
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Max. Trigger speed |
100MHz / 10ns |
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Trigger Qualify |
0, 1, x (don't care) Settings for all digital channels |
Simultaneous trigger Pattern and Logic channel |
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Power Supply |
No External Power Source Require |
From USB Port < 450mA |
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Net Weight |
120 Grams |
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Size (Dimension) |
107mm x 77mm x 16mm |
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Accessories |
Color Wires Harness + clips, USB 2.0 Cable. User's Manual, Software Driver. |
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